SAI VIDYA INSTITUTE OF TECHNOLOGY
Department of Information Science and Engineering
***Analog and Digital Electronics***Analog and Digital Electronics***Analog and Digital Electronics***Analog and Digital Electronics***Analog and Digital Electronics***Analog and Digital Electronics***Analog and Digital Electronics***Analog and Digital Electronics***

Wednesday, November 1, 2017

MODULE 3 (first half) NOTES

Analog &Digital Electronics November 01, 2017 No comments :
MODULE 3 (first half) NOTES

SYLLABUS: 
  • Multiplexers
  • De-multiplexers
  • 1 of 16 Decoders
  • BCD to Decimal Decoders
  • Seven Segment Decoders
  • Encoders
  • Exclusive-OR gates
  • Parity Generator and Checkers
  • Magnitude Comparator
  • PAL and PLA
  • HDL implementation of Data Processing Circuits
  • Arithmetic Logic Circuits and ALU



No comments :

Post a Comment

Subscribe to: Post Comments ( Atom )
F